Refactor software renderer (#6621)
This commit is contained in:
@@ -80,7 +80,7 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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const auto& program_code = setup.program_code;
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// Placeholder for invalid inputs
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static float24 dummy_vec4_float24[4];
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static f24 dummy_vec4_float24[4];
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unsigned iteration = 0;
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bool exit_loop = false;
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@@ -111,7 +111,7 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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debug_data.max_offset = std::max<u32>(debug_data.max_offset, 1 + program_counter);
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auto LookupSourceRegister = [&](const SourceRegister& source_reg) -> const float24* {
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auto LookupSourceRegister = [&](const SourceRegister& source_reg) -> const f24* {
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switch (source_reg.GetRegisterType()) {
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case RegisterType::Input:
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return &state.registers.input[source_reg.GetIndex()].x;
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@@ -137,15 +137,15 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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? 0
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: state.address_registers[instr.common.address_register_index - 1];
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const float24* src1_ = LookupSourceRegister(instr.common.GetSrc1(is_inverted) +
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(is_inverted ? 0 : address_offset));
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const float24* src2_ = LookupSourceRegister(instr.common.GetSrc2(is_inverted) +
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(is_inverted ? address_offset : 0));
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const f24* src1_ = LookupSourceRegister(instr.common.GetSrc1(is_inverted) +
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(is_inverted ? 0 : address_offset));
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const f24* src2_ = LookupSourceRegister(instr.common.GetSrc2(is_inverted) +
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(is_inverted ? address_offset : 0));
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const bool negate_src1 = ((bool)swizzle.negate_src1 != false);
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const bool negate_src2 = ((bool)swizzle.negate_src2 != false);
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float24 src1[4] = {
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f24 src1[4] = {
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src1_[(int)swizzle.src1_selector_0.Value()],
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src1_[(int)swizzle.src1_selector_1.Value()],
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src1_[(int)swizzle.src1_selector_2.Value()],
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@@ -157,7 +157,7 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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src1[2] = -src1[2];
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src1[3] = -src1[3];
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}
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float24 src2[4] = {
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f24 src2[4] = {
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src2_[(int)swizzle.src2_selector_0.Value()],
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src2_[(int)swizzle.src2_selector_1.Value()],
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src2_[(int)swizzle.src2_selector_2.Value()],
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@@ -170,12 +170,11 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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src2[3] = -src2[3];
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}
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float24* dest =
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(instr.common.dest.Value() < 0x10)
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? &state.registers.output[instr.common.dest.Value().GetIndex()][0]
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: (instr.common.dest.Value() < 0x20)
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? &state.registers.temporary[instr.common.dest.Value().GetIndex()][0]
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: dummy_vec4_float24;
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f24* dest = (instr.common.dest.Value() < 0x10)
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? &state.registers.output[instr.common.dest.Value().GetIndex()][0]
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: (instr.common.dest.Value() < 0x20)
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? &state.registers.temporary[instr.common.dest.Value().GetIndex()][0]
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: dummy_vec4_float24;
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debug_data.max_opdesc_id =
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std::max<u32>(debug_data.max_opdesc_id, 1 + instr.common.operand_desc_id);
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@@ -216,7 +215,7 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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if (!swizzle.DestComponentEnabled(i))
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continue;
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dest[i] = float24::FromFloat32(std::floor(src1[i].ToFloat32()));
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dest[i] = f24::FromFloat32(std::floor(src1[i].ToFloat32()));
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}
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Record<DebugDataRecord::DEST_OUT>(debug_data, iteration, dest);
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break;
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@@ -263,11 +262,10 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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OpCode::Id opcode = instr.opcode.Value().EffectiveOpCode();
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if (opcode == OpCode::Id::DPH || opcode == OpCode::Id::DPHI)
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src1[3] = float24::FromFloat32(1.0f);
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src1[3] = f24::One();
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int num_components = (opcode == OpCode::Id::DP3) ? 3 : 4;
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float24 dot = std::inner_product(src1, src1 + num_components, src2,
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float24::FromFloat32(0.f));
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f24 dot = std::inner_product(src1, src1 + num_components, src2, f24::Zero());
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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@@ -283,7 +281,7 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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case OpCode::Id::RCP: {
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Record<DebugDataRecord::SRC1>(debug_data, iteration, src1);
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Record<DebugDataRecord::DEST_IN>(debug_data, iteration, dest);
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float24 rcp_res = float24::FromFloat32(1.0f / src1[0].ToFloat32());
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f24 rcp_res = f24::FromFloat32(1.0f / src1[0].ToFloat32());
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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continue;
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@@ -298,7 +296,7 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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case OpCode::Id::RSQ: {
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Record<DebugDataRecord::SRC1>(debug_data, iteration, src1);
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Record<DebugDataRecord::DEST_IN>(debug_data, iteration, dest);
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float24 rsq_res = float24::FromFloat32(1.0f / std::sqrt(src1[0].ToFloat32()));
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f24 rsq_res = f24::FromFloat32(1.0f / std::sqrt(src1[0].ToFloat32()));
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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continue;
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@@ -345,8 +343,7 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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if (!swizzle.DestComponentEnabled(i))
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continue;
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dest[i] = (src1[i] >= src2[i]) ? float24::FromFloat32(1.0f)
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: float24::FromFloat32(0.0f);
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dest[i] = (src1[i] >= src2[i]) ? f24::One() : f24::Zero();
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}
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Record<DebugDataRecord::DEST_OUT>(debug_data, iteration, dest);
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break;
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@@ -360,8 +357,7 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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if (!swizzle.DestComponentEnabled(i))
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continue;
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dest[i] = (src1[i] < src2[i]) ? float24::FromFloat32(1.0f)
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: float24::FromFloat32(0.0f);
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dest[i] = (src1[i] < src2[i]) ? f24::One() : f24::Zero();
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}
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Record<DebugDataRecord::DEST_OUT>(debug_data, iteration, dest);
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break;
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@@ -413,7 +409,7 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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Record<DebugDataRecord::DEST_IN>(debug_data, iteration, dest);
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// EX2 only takes first component exp2 and writes it to all dest components
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float24 ex2_res = float24::FromFloat32(std::exp2(src1[0].ToFloat32()));
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f24 ex2_res = f24::FromFloat32(std::exp2(src1[0].ToFloat32()));
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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continue;
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@@ -430,7 +426,7 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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Record<DebugDataRecord::DEST_IN>(debug_data, iteration, dest);
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// LG2 only takes the first component log2 and writes it to all dest components
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float24 lg2_res = float24::FromFloat32(std::log2(src1[0].ToFloat32()));
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f24 lg2_res = f24::FromFloat32(std::log2(src1[0].ToFloat32()));
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for (int i = 0; i < 4; ++i) {
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if (!swizzle.DestComponentEnabled(i))
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continue;
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@@ -466,17 +462,17 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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? 0
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: state.address_registers[instr.mad.address_register_index - 1];
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const float24* src1_ = LookupSourceRegister(instr.mad.GetSrc1(is_inverted));
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const float24* src2_ = LookupSourceRegister(instr.mad.GetSrc2(is_inverted) +
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(!is_inverted * address_offset));
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const float24* src3_ = LookupSourceRegister(instr.mad.GetSrc3(is_inverted) +
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(is_inverted * address_offset));
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const f24* src1_ = LookupSourceRegister(instr.mad.GetSrc1(is_inverted));
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const f24* src2_ = LookupSourceRegister(instr.mad.GetSrc2(is_inverted) +
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(!is_inverted * address_offset));
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const f24* src3_ = LookupSourceRegister(instr.mad.GetSrc3(is_inverted) +
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(is_inverted * address_offset));
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const bool negate_src1 = ((bool)mad_swizzle.negate_src1 != false);
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const bool negate_src2 = ((bool)mad_swizzle.negate_src2 != false);
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const bool negate_src3 = ((bool)mad_swizzle.negate_src3 != false);
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float24 src1[4] = {
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f24 src1[4] = {
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src1_[(int)mad_swizzle.src1_selector_0.Value()],
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src1_[(int)mad_swizzle.src1_selector_1.Value()],
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src1_[(int)mad_swizzle.src1_selector_2.Value()],
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@@ -488,7 +484,7 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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src1[2] = -src1[2];
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src1[3] = -src1[3];
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}
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float24 src2[4] = {
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f24 src2[4] = {
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src2_[(int)mad_swizzle.src2_selector_0.Value()],
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src2_[(int)mad_swizzle.src2_selector_1.Value()],
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src2_[(int)mad_swizzle.src2_selector_2.Value()],
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@@ -500,7 +496,7 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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src2[2] = -src2[2];
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src2[3] = -src2[3];
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}
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float24 src3[4] = {
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f24 src3[4] = {
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src3_[(int)mad_swizzle.src3_selector_0.Value()],
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src3_[(int)mad_swizzle.src3_selector_1.Value()],
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src3_[(int)mad_swizzle.src3_selector_2.Value()],
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@@ -513,12 +509,11 @@ static void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData
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src3[3] = -src3[3];
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}
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float24* dest =
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(instr.mad.dest.Value() < 0x10)
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? &state.registers.output[instr.mad.dest.Value().GetIndex()][0]
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: (instr.mad.dest.Value() < 0x20)
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? &state.registers.temporary[instr.mad.dest.Value().GetIndex()][0]
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: dummy_vec4_float24;
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f24* dest = (instr.mad.dest.Value() < 0x10)
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? &state.registers.output[instr.mad.dest.Value().GetIndex()][0]
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: (instr.mad.dest.Value() < 0x20)
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? &state.registers.temporary[instr.mad.dest.Value().GetIndex()][0]
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: dummy_vec4_float24;
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Record<DebugDataRecord::SRC1>(debug_data, iteration, src1);
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Record<DebugDataRecord::SRC2>(debug_data, iteration, src2);
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@@ -687,7 +682,7 @@ DebugData<true> InterpreterEngine::ProduceDebugInfo(const ShaderSetup& setup,
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DebugData<true> debug_data;
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// Setup input register table
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state.registers.input.fill(Common::Vec4<float24>::AssignToAll(float24::Zero()));
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state.registers.input.fill(Common::Vec4<f24>::AssignToAll(f24::Zero()));
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state.LoadInput(config, input);
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RunInterpreter(setup, state, debug_data, setup.engine_data.entry_point);
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return debug_data;
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