[PICA] Implement FLR
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@@ -16,6 +16,7 @@ namespace ShaderOpcodes {
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DP3 = 0x01,
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DP4 = 0x02,
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MUL = 0x08,
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FLR = 0x0B,
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MAX = 0x0C,
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MIN = 0x0D,
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RCP = 0x0E,
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@@ -95,6 +96,7 @@ class PICAShader {
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void cmp(u32 instruction);
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void dp3(u32 instruction);
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void dp4(u32 instruction);
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void flr(u32 instruction);
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void ifc(u32 instruction);
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void ifu(u32 instruction);
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void jmpc(u32 instruction);
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@@ -22,6 +22,7 @@ void PICAShader::run() {
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case ShaderOpcodes::DP3: dp3(instruction); break;
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case ShaderOpcodes::DP4: dp4(instruction); break;
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case ShaderOpcodes::END: return; // Stop running shader
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case ShaderOpcodes::FLR: flr(instruction); break;
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case ShaderOpcodes::IFC: ifc(instruction); break;
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case ShaderOpcodes::IFU: ifu(instruction); break;
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case ShaderOpcodes::JMPC: jmpc(instruction); break;
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@@ -176,6 +177,24 @@ void PICAShader::mul(u32 instruction) {
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}
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}
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void PICAShader::flr(u32 instruction) {
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const u32 operandDescriptor = operandDescriptors[instruction & 0x7f];
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u32 src = (instruction >> 12) & 0x7f;
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const u32 idx = (instruction >> 19) & 3;
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const u32 dest = (instruction >> 21) & 0x1f;
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src = getIndexedSource(src, idx);
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vec4f srcVector = getSourceSwizzled<1>(src, operandDescriptor);
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vec4f& destVector = getDest(dest);
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u32 componentMask = operandDescriptor & 0xf;
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for (int i = 0; i < 4; i++) {
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if (componentMask & (1 << i)) {
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destVector[3 - i] = f24::fromFloat32(std::floor(srcVector[3 - 1].toFloat32()));
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}
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}
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}
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void PICAShader::max(u32 instruction) {
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const u32 operandDescriptor = operandDescriptors[instruction & 0x7f];
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const u32 src1 = (instruction >> 12) & 0x7f;
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