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Commit Graph
528 Commits
Author SHA1 Message Date
Sky e9b3b7c2a2 Add workaround helper for bit_cast and missing #include <bit> 
Allows compilation on native macOS build system.
 2023-06-18 12:33:34 -07:00
Wunkolo 6ee3f73335 Bisect TextureFmt and ColorFmt 
Makes framebuffer-formats unrepresentable from texture formats while
allowing them to alias each other. Add utility functions as well that
just re-use the `TextureFmt` ones.
 2023-06-18 08:22:14 -07:00
Wunkolo 134e16d8ea Replace Texture::Formats with PICA::ColorFmt 
This enum was a duplicate of the PICA one. Now the PICA one is more
complete. Migrate `textureFormatToString` to be next to the enums
definition.
 2023-06-18 00:10:04 -07:00
Wunkolo 838d3f27f9 Migrate PICA-types into PICA namespace 
Rather than prefixing these types with `PICA`, a namespace is used instead.
 2023-06-17 18:23:47 -07:00
fleroviux 1416456035 [GPU] DOT3_RGB(A) modes should remap the operands from [0, 1] to [-1, +1] range 2023-06-18 01:32:32 +02:00
Wunkolo 78a3f9fa23 Add PICA texel-format and topology types 
Slowly stepping the codebase towards having renderer-agnostic types and keeping the translation of PICA-types to OpenGL/VK/DX/Software/etc to the renderer-backend.
 2023-06-17 12:26:41 -07:00
wheremyfoodatandGitHub d0ae5f0546 Merge pull request #37 from marysaka/feat/proper-hle-result 
hle: Add proper type for result code
 2023-06-17 18:39:36 +03:00
fleroviux 78827886fe Merge branch 'master' of github.com:fleroviux/Panda3DS into pica-tev-emulation 2023-06-17 12:39:48 +02:00
fleroviux 3aeef23b2e Merge branch 'bottom-screen' of github.com:fleroviux/Panda3DS into pica-tev-emulation 2023-06-17 12:38:33 +02:00
Mary f3010f0909 misc: Switch from gl3w to glad 
Also add more checks on window and context creation.
 2023-06-17 11:26:18 +02:00
fleroviux c9642292aa [GPU] Do scale on the final texture combiner output, not the individual sources 2023-06-17 02:06:05 +02:00
fleroviux b854367676 [GPU] Move TEV uniforms update into its own method 2023-06-17 01:58:30 +02:00
fleroviux a368d77005 [GPU] respect GPUREG_TEXENVi_SCALE 2023-06-17 01:42:53 +02:00
fleroviux aef808cdfc [GPU] Cleanup TEV shader code to be less redundant 2023-06-17 01:35:35 +02:00
fleroviux c3acf2b393 [GPU] cleanup and optimize the TEV shader functions 2023-06-17 01:27:26 +02:00
wheremyfoodat 5b3266be34 Fix merge conflict 2023-06-17 02:22:19 +03:00
wheremyfoodat 7b859ad602 Merge branch 'master' into bottom-screen 2023-06-17 02:19:30 +03:00
wheremyfoodatandGitHub 1aab10bec7 Merge pull request #35 from Wunkolo/span-cpu-state 
Use `std::span` for CPU register-state
 2023-06-17 01:39:33 +03:00
fleroviux 76d6140797 [GPU] Fix order of operands to mix() in the interpolation combine mode. 2023-06-17 00:12:07 +02:00
fleroviux bcf6401d4d [GPU] Output mangenta when an unimplemented TEV source is used 2023-06-16 23:39:05 +02:00
wheremyfoodat 936302da2a Raise clang-format column size, make std::span support in opengl.hpp version-dependent 2023-06-16 22:06:59 +03:00
Mary 122b1b2727 hle: Add proper type for result code 
This should clean up all HLE errorcode in the codebase.

I didn't removed Rust::Result as this should be a cleanup for another
iteration.
 2023-06-16 20:09:37 +02:00
Wunkolo 553d23974a Use std::span to pass vertex data 
Starts utilizing
[std::span](https://en.cppreference.com/w/cpp/container/span) to
indicate a non-owning view of a contiguous array of elements rather than
`T* data, usize count`.
 2023-06-16 07:28:35 -07:00
Wunkolo fde93381a5 Use std::span for CPU register-state 
Following the trend of #33: `std::span` provides some useful utility
functions like `size_bytes()` and `as_bytes()` and serves as a better
non-owning "chunk of data"-type over just passing around an
`std::array&`.
 2023-06-16 07:24:37 -07:00
wheremyfoodat 519fb35c5f Less UB 2023-06-16 14:22:29 +03:00
fleroviux 2e85f30c10 [GPU] attempt to emulate the previous TEV color buffer 2023-06-16 01:34:11 +02:00
fleroviux d153133070 [GPU] fix missing break statements in 'previous' combiner mode implementation 2023-06-16 00:52:00 +02:00
fleroviux 1aa4dea63e [GPU] Add the remaining two TEV units 
Looks like I overlooked the fact there actually are fix texture combiners,
not just four. The last two texture combiners are easy to miss, because
there are other GPU registers between the first four combiners and the last two.
 2023-06-16 00:41:48 +02:00
fleroviux e7435e3fdf [GPU] implement TEV combiner chaining and the remaining combine modes 2023-06-16 00:33:42 +02:00
fleroviux 525890bff7 [GPU] Upload configuration for all texture combiners to the shader program 
Upload the configuration register values for the remaining texture combiners to the
shader program's uniforms. This is in preparation for emulating those texture combiners next.
 2023-06-15 23:27:33 +02:00
fleroviux e66370598a Fix the formatting which I broke (sorry) 2023-06-15 23:01:16 +02:00
fleroviux 4322ebda2c [GPU] Start texture combiner implementation 
This commit first implements experimental and incomplete
texture combiner support. Currently only the first texture combiner
is implemented. Many sources and combine modes are not implemented yet.
 2023-06-15 22:45:13 +02:00
wheremyfoodat 79c3cf2661 [Shader JIT] Less UB 2023-06-15 19:30:51 +03:00
wheremyfoodatandWunk 3cf4bdd95f [Shader JIT] Use rotl+xor for combining hashes 
Co-Authored-By: Wunk <wunkolo@gmail.com>
 2023-06-15 01:58:00 +03:00
wheremyfoodat 87ac4d5a0f {GL renderer] Better screen stub 2023-06-14 21:47:17 +03:00
wheremyfoodat f0f7327b90 [PICA] Switch to xxh3 by default 2023-06-14 15:39:29 +03:00
wheremyfoodat f82b27ddba Add xxhash 2023-06-14 14:46:11 +03:00
wheremyfoodat 3606c005c5 Merge branch 'master' into dynapica 2023-06-14 13:55:15 +03:00
wheremyfoodat 8284c3cda4 Remove printf 2023-06-14 13:49:47 +03:00
wheremyfoodat 8e90b8a103 [GPU] Bottom screen stub 2023-06-13 22:47:01 +03:00
wheremyfoodat 2520b2cb46 [GPU] Disable blend when rendering output texture 2023-06-13 20:38:17 +03:00
wheremyfoodat 4f619086e9 [HID] Add touchscreen 2023-06-13 15:44:55 +03:00
wheremyfoodat 5200c10b27 [Emulator] Handle left click 2023-06-13 15:41:02 +03:00
wheremyfoodat f538d38c98 [Shader JIT] Add index = 3 to indexed register addressing 2023-06-12 00:16:21 +03:00
wheremyfoodat 3f2b713c4b [Shader JIT] Attempt to implement FLR and CALLU 2023-06-11 23:51:45 +03:00
wheremyfoodat 137b652840 [Shader JIT] Attempt to add CALLC/JMPC/JMPU/LOOP 2023-06-11 23:43:47 +03:00
wheremyfoodatandGitHub 0c213900bc [FS] Actually add FlushFile 2023-06-11 23:24:12 +03:00
wheremyfoodat 71fd8de92f [Shader JIT] Add MIN 2023-06-11 22:08:02 +03:00
wheremyfoodat ff3c162ebc Merge branch 'master' into dynapica 2023-06-11 14:44:24 +03:00
wheremyfoodat 315ab1fa16 Merge branch 'master' into dynapica 2023-06-11 14:43:03 +03:00