moonpower/azahar-UWP
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Author SHA1 Message Date
Lioncash 676daef3c7 core: Fix some warnings on OSX 2015-02-03 08:14:42 -05:00
Lioncash 8c944bd1f0 vfp: Get rid of some compile warnings 2015-01-31 22:14:00 -05:00
Lioncash 3f00dd9117 arm: Clean up ARMul_State 
Remove unnecessary/unused struct variables.
 2015-01-31 21:55:34 -05:00
Lioncash f44781fd7b arm: Adios armemu 2015-01-31 20:43:03 -05:00
Lioncash b6cfc48a0b dyncom: clean up arm_dyncom_dec.h 2015-01-30 16:28:52 -05:00
Lioncash fc1a9e35fb arm: Move headers over to pragma once 2015-01-30 16:17:02 -05:00
Lioncash 83bc1a3120 arm: Get rid of armcpu.h and skyeye_types.h 2015-01-30 16:16:58 -05:00
Lioncash 904194c3e8 arm: Clean out armos.h and armmmu.h 2015-01-30 15:48:57 -05:00
Lioncash 09a66860e2 arm: Throw out a lot of unnecessary code 2015-01-30 13:32:03 -05:00
Lioncash 3dfef1701c armdefs: Move some defines over to enums 2015-01-30 12:43:58 -05:00
Lioncash 96c174aed4 shared_memory: Fix assignments in SharedMemory::Map 2015-01-30 11:37:53 -05:00
Lioncash 0c4685ca12 loader: Add missing printf argument 2015-01-30 11:34:05 -05:00
Lioncash 551264f815 archive: Fix initializer list order for the File class. 2015-01-30 11:30:22 -05:00
Lioncash 0c53cc52bd apt_u: Fix missing printf specifiers 2015-01-30 11:28:09 -05:00
Lioncash 7a3e371141 dyncom: Minor cleanup 
Narrow scopes for the instruction variables. Remove unnecessary parentheses.
 2015-01-27 08:51:18 -05:00
Lioncash e09fb7becc vfp: Clean up vertical alignment for instructions 2015-01-23 13:35:08 -05:00
Lioncash 8810dfe1de dyncom: Minor cleanup 
Removes some unused macros and cleans up indentation inconsistencies
 2015-01-22 09:39:41 -05:00
Lioncash a3f5e5605c core: Fix a few docstrings 2015-01-20 13:52:44 -05:00
Lioncash bfef0aa07e core_timing: Mark several variables as static 
These are only used in this translation unit.
 2015-01-20 13:49:10 -05:00
Lioncash 8c6edc680c dyncom: Clarify precedence for ternary statements 2015-01-19 20:35:55 -05:00
Lioncash a873f157d0 dyncom: Implement missing shifts in ScaledRegisterPostIndexed, etc 2015-01-18 18:32:02 -05:00
Lioncash 8575010a68 dyncom: Handle the ARM A2 encoding of STRT/LDRT 
These were also missing the shifted register case.
 2015-01-17 13:53:35 -05:00
Lioncash 0a5d450e94 dyncom: Handle the ARM A2 encoding of LDRBT/STRBT. 2015-01-16 21:05:27 -05:00
Lioncash 9288893d29 vfp: Remove dead code 2015-01-12 15:24:57 -05:00
Lioncash f7770b83d4 dyncom: Fix 32-bit ASR shifts for immediates 2015-01-12 14:15:24 -05:00
Lioncash e16b35eb53 dyncom: Remove unused flag macros 2015-01-12 12:57:15 -05:00
Lioncash 2843d1b98b dyncom: Get rid of unnecessary outer-scope variables in InterpreterMainLoop 2015-01-12 01:11:46 -05:00
Lioncash 3ace75a49f dyncom: Fix overflow flag setting for ADD/RSB/RSC/SUB/SBC 
Also cleans up CMN, and CMP.
 2015-01-12 01:03:58 -05:00
Lioncash 9c2c89b7e1 dyncom: Add a helper function for addition with a carry 2015-01-12 00:44:28 -05:00
Lioncash d2a05bbbc6 dyncom: Fix ADC overflow flag setting 2015-01-11 22:27:09 -05:00
Lioncash eabfa5cf43 dyncom: Fix conditional execution of MSR 2015-01-11 18:45:45 -05:00
Lioncash 1cef6e92d5 dyncom: Fix UMAAL 
These need to be done as a 64-bit operation.
 2015-01-08 11:09:21 -05:00
Lioncash df5e0f9f28 dyncom: Fix SMULWB/SMULWT 
Wasn't doing proper sign-extension
 2015-01-07 16:41:08 -05:00
Lioncash 75c211c10f dyncom: Fix SWPB 2015-01-07 09:36:06 -05:00
Lioncash 511e13f3e3 dyncom: Move over SMLALXY 2015-01-07 00:53:56 -05:00
Lioncash f75def619c dyncom: Partially emulate BXJ 
Just in case some game studio let the intern write inline assembly or something.
 2015-01-05 15:55:09 -05:00
Lioncash e08a39a2f4 dyncom: Actually set the Q flag for SMLABB/SMLABT/SMLATB/SMLATT 
Easy skyeye todo fix.
 2015-01-05 10:41:02 -05:00
Lioncash d00c22c706 dyncom: Implement QADD/QSUB/QDADD/QDSUB 2015-01-05 09:13:41 -05:00
Lioncash 41e1cb12e5 skyeye: Remove duplicate typedefs 
citra already has its own typedefs like this.
 2015-01-04 12:34:02 -05:00
Lioncash 6adc0a4622 dyncom: Implement SMLAW 2015-01-03 03:13:49 -05:00
Lioncash 2f19acf064 dyncom: Implement REVSH 
Also joins the REV ops into one common place.
 2015-01-02 22:40:43 -05:00
Lioncash e0e54f55d7 dyncom: Implement SMLALD/SMLSLD 2015-01-02 22:08:26 -05:00
Lioncash 64161bcb41 dyncom: Implement SMMLA/SMMUL/SMMLS 2015-01-02 21:40:29 -05:00
Lioncash bf23f94571 elf: Make DidRelocate const 2015-01-02 20:32:16 -05:00
Lioncash 0d81b1e75b archive: Fix initializer list order 2015-01-02 20:30:57 -05:00
Lioncash 67187c15a0 dyncom: Remove dead function InterpreterInitInstLength 
Technically eliminates two memory leaks as well.
 2015-01-02 20:24:00 -05:00
Lioncash bdbd111c7e soc_u: Fix a missing formatting argument 2015-01-02 19:54:21 -05:00
Lioncash bee4ff8454 armemu: Fix missing Q flag check for SMLSD. 2015-01-02 18:29:36 -05:00
Lioncash 3337b84620 dyncom: Implement SMLAD/SMUAD/SMLSD/SMUSD 2015-01-02 18:29:30 -05:00
Lioncash 48bf0f9996 dyncom: Implement SXTAB16 and SXTB16 2015-01-01 21:59:37 -05:00
Lioncash 524da47698 dyncom: Implement SHADD8/SHADD16/SHSUB8/SHSUB16/SHASX/SHSAX 2015-01-01 10:34:20 -05:00
Lioncash 481a6c9652 Fix SADD8/SSUB8 in the armemu 2015-01-01 09:44:32 -05:00
Lioncash 4e2cb06b81 dyncom: Implement SADD8/SSUB8 2015-01-01 09:39:40 -05:00
Lioncash 3cc4af99d1 dyncom: Implement UADD8/UADD16/USUB8/USUB16/UASX/USAX 2014-12-31 06:45:41 -05:00
Lioncash 5894c407c2 vfp: Get rid of a few warnings 2014-12-30 13:08:56 -05:00
Lioncash 6ce4b7b666 vfp: Implement VMOVBRRSS 2014-12-30 11:04:22 -05:00
Lioncash cc9f458ad3 dyncom: Implement USAT16/SSAT16 2014-12-30 09:43:24 -05:00
Lioncash d08d9f8747 dyncom: Fix SMLALXY's instruction labels 
They were erroneously labeled as SMLAL.
 2014-12-29 12:04:34 -05:00
Lioncash e412c0fc46 dyncom: Implement QADD8/QSUB8 2014-12-29 00:54:48 -05:00
Lioncash 7ad400d5a7 armemu: Implement QADD8/QSUB8 2014-12-29 00:49:10 -05:00
Lioncash 5c198686ce dyncom: Implement UXTB16/UXTAB16 2014-12-28 22:45:04 -05:00
Lioncash 9c7f2570f7 vfp: Actually make the code somewhat readable 2014-12-28 18:55:01 -05:00
Lioncash 7d322b5c6f dyncom: Implement USAD8/USADA8 2014-12-28 12:40:51 -05:00
Lioncash 6ce2a38ec4 armemu: Simplify SSAT/SSAT16/SXTB/SXTAB 2014-12-28 12:19:31 -05:00
Lioncash 9f5b53f9ff armemu: Simplify REV/REV16/SXTH/SXTAH 2014-12-28 12:13:13 -05:00
Lioncash 914ecfe04f armemu: Simplify USAT16/UXTB/UXTAB 2014-12-28 11:57:14 -05:00
Lioncash 5e16216afb armemu: Simplify REVSH/UXTH/UXTAH 2014-12-28 11:57:09 -05:00
Lioncash 059c65a27a armemu: Fix underflows in USAD8/USADA8 
Initially reported by xdec.
 2014-12-28 06:09:43 -05:00
Lioncash af69b0840b dyncom: Implement UQADD8, UQADD16, UQSUB8, UQSUB16, UQASX, and UQSAX. 2014-12-27 17:24:34 -05:00
Lioncash 60523113a9 armemu: Implement UQADD8, UQADD16, UQSUB16, UQASX, and UQSAX 2014-12-27 17:06:19 -05:00
Lioncash 52d889d85d dyncom: Implement UHADD8, UHADD16, UHSUB8, UHSUB16, UHASX, and UHSAX 2014-12-27 00:57:32 -05:00
Lioncash 84a0438cf5 armemu: Implement UHADD8, UHADD16, UHSUB8, UHSUB16, UHASX, and UHSAX 2014-12-26 23:55:39 -05:00
Lioncash 35dbfc7ab0 armemu: Implement SMMUL, SMMLA, and SMMLS. 2014-12-25 13:52:46 -05:00
Lioncash 82c3962b95 armemu: Implement SMLALD/SMLSLD 2014-12-24 09:29:48 -05:00
Lioncash 6b7808e412 armemu: Fix GE/Q flag setting semantics 2014-12-24 07:56:57 -05:00
Lioncash 20fc5f2a35 armemu: Set the Q flag correctly for much of the other ops 
They were setting the old S flag.
 2014-12-23 09:59:37 -05:00
Lioncash 79a7a432c5 armemu: Set the Q flag properly for SMLAD/SMUAD 2014-12-23 09:58:21 -05:00
Lioncash 6446331938 armemu: Properly set the Q flag for SSAT16/USAT16 upon saturation. 2014-12-22 23:52:05 -05:00
Lioncash f66d356938 armemu: Fix SEL 
Needs to use the updated state of the CPSR.
 2014-12-22 23:52:05 -05:00
Lioncash 8e2accd974 armemu: Fix construction of the CPSR 2014-12-22 23:51:59 -05:00
Lioncash 8c72322422 armemu: Fix retrieval of the CPSR in MRS instructions. 2014-12-22 21:44:03 -05:00
Lioncash 97f3e884d2 dyncom: Move over QADD16/QASX/QSAX/QSUB16 2014-12-22 01:09:42 -05:00
Lioncash 245276c9cc dyncom: Move SEL over 2014-12-21 21:19:15 -05:00
Lioncash c6f27055c9 dyncom: Move over SASX/SSAX/SADD16/SSUB16 2014-12-21 19:50:36 -05:00
Lioncash 855eda6f85 armemu: Implement SADD8/SSUB8 2014-12-20 23:10:35 -05:00
Lioncash 2a097f0990 armemu: Should be using labs for USAD8/USADA8 2014-12-20 15:34:14 -05:00
Lioncash 4b506cec01 armemu: Implement QASX and QSAX 2014-12-19 14:09:18 -05:00
Lioncash 0f3a6a161c armemu: Implement SMLSD 2014-12-19 09:53:54 -05:00
Lioncash 4a646ace1f dyncom: Implement UMAAL 2014-12-19 04:02:14 -05:00
Lioncash 00e8ec4a9e armemu: Implement USAD8 and USADA8 2014-12-18 23:38:57 -05:00
Lioncash 92c53fe522 armemu: Fix SSAT16 
The lower-bound would never be negative like it should
 2014-12-18 20:35:14 -05:00
Lioncash b9fc0b4b80 armemu: Clean up naming and formatting for SSAT16 2014-12-18 20:34:22 -05:00
Lioncash e683f654ce armemu: Fix lower-bounds clamping for USAT16 2014-12-18 16:54:01 -05:00
Lioncash 6b632bbe37 armemu: More concise names for USAT16-related variables 2014-12-18 14:25:07 -05:00
Lioncash eaae0ad502 armemu: Get rid of bitwise parenthesis warnings 2014-12-18 12:07:18 -05:00
Lioncash 4dc8eb40be armemu: Set GE flags correctly for SSUB16, SADD16, SSAX, and SASX. 2014-12-18 11:45:40 -05:00
Lioncash 85c318078d armemu: Combine SSUB16, SADD16, SASX, and SSAX. 2014-12-17 21:17:54 -05:00
Lioncash 41fee1c940 armemu: Unset GE flags for UADD8 if results are < 0x100 
Reference manual states these must be set to zero if this case is true.
 2014-12-17 17:54:49 -05:00
Lioncash 58dc554733 armemu: Fix SSUB16 
Broken from the same reason SADD16 was.

The lo part of the result should only be constructed from the lo halfwords of rm and rn.
The hi part of the result should only be constructed from the hi halfwords of rm and rn.
 2014-12-17 15:40:10 -05:00
Lioncash 5820dba6b7 armemu: Implement UMAAL 2014-12-17 12:21:21 -05:00